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NTE1739 Integrated Circuit TV Horizontal/Vertical Countdown Digital Sync System
Features: D Horizontal Oscillator D Vertical Countdown D Composite Blanking Output D Burst-Gate Output D Horizontal Ramp Generator D Internal Shunt Regulator Description: The NTE1739 is a video sync system in a 16-Lead DIP type package designed for use in television, monitor or video display products. The NTE1739 contains a horizontal phase-locked oscillator and vertical countdown. It also features composite blanking and burst-gate outputs which, when externally summed, produce the sandcastle pulse necessary for the operation of most chroma/luma circuits. The NTE1739 is intended for use in 525-line systems and operates with standard or nonstandard input signals. An automatic mode-recognition circuit forces operation into the nonsynchronous mode for nonstandard sync input signals. Absolute Maximum Ratings: DC Supply Current, Pin7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Input Voltage (All Inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to V+ + 1V Device Dissipation (TA +85C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900mW Derate Linearly Above 85C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14mW/C Operating Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to +150C Lead Temperature (During Soldering, 1/16 1/32 in. (1.59 0.79mm) from case, 10s max) . . . +265C Circuit Operation The master oscillator operates at 8 times the horizontal rate, fH, as determined by the external LC connected between Pin5 and Pin6. The master oscillator is divided by 2, 4, and 8 and is then fed to the horizontal output amplifier and also to a 10-stage vertical countdown circuit. Horizontal AFC is performed by comparing the horizontal ramp input signal on Pin2, derived from the flyback pulse, to the horizontal sync signal on Pin3, producing correction voltage. The correction voltage then is applied to the master oscillator to phase lock the system. The divide by 2 and 4 outputs are used to drive a 10-stage counter for the vertical circuits. The use of the countdown system and associated logic circuits assures good noise immunity and the deletion of the vertical hold control.
Circuit Operation (Cont'd) The Gain/Window switch input on Pin10 is a logic input which controls the digital window in which the system looks for the occurrence of a vertical sync pulse: it also adjusts the phase detector gain for the two corresponding vertical windows. The 464th (Pin10 = low) or the 512th (Pin10 = high) clock pulse (at 2fH) from the horizontal divider is used to set the start of the vertical sync window. The end of the sync window occurs at the 592nd (Pin10 = low) or the 568th (Pin10 = High) clock pulse. If the incoming vertical sync pulse occurs regularly at the same time the 525th clock pulse occurs, it is used to generate the start of the vertical blanking and vertical sweep; the system is in the standard sync mode. If the incoming vertical sync pulse pulse is absent (removed by noise, for example), the 10-stage counter will continue to provide an output pulse at the 525th clock pulse; a 3-bit counter will count the number of fields where no sync pulse occurred coincident with the 525th clock pulse. If no coincidence is detected in 8 sequential fields, the 3-bit counter energizes the toggle which shifts the mode of operation from standard sync to nonstandard sync. In the nonstandard sync mode vertical scan is initiated by the incoming vertical sync pulse. Non standard sync operation results when the incoming vertical sync pulse occurs regularly within the vertical sync window; 464 to 592 counts (Pin10 = low) or 512 to 568 counts (Pin10 = high) but not at the 525th count (Standard Sync Mode). In the nonstandard sync mode if no sync pulse is present, the system will free run at a frequency determined by the 592 (Pin10 = low) or 568 (Pin10 = high) count. The NTE1739 generates a composite blanking signal and a burst-gate (key pulse) which, when summed externally, produce the sandcastle pulse necessary for the operation of most Chrom/Luminance integrated circuits. Electrical Characteristics: (TA = +25 to +70C unless otherwise specified)
Parameter Supply Current Regulator Voltage Saturation Voltages Horizontal Output Inverted Horizontal Output Vertical Output Blanking Output Horizontal Ramp Output Horizontal VCO Free Running Freq. Horizontal VCO Oscillator Pull-In Horizontal Blanking Width Vertical Blanking Width Burst Gate Width Burst Gate Delay Horizontal Pulse Width Vertical Pulse Width Horizontal Sync Input Vertical Sync Input Pin 7 7 8 13 11 12 15 8 8 12 12 16 16 8 11 - - No Sync Applied S1 = B For 15734 1Hz Std NTSC Sync Applied Std NTSC Sync Applied Std NTSC Sync Applied From End of Horizontal Sync (Pin3) to Start of Burst Gate (Pin16) Std NTSC Sync Applied Std NTSC Sync Applied Test Conditions Adjust 24V Supply for 7V on Pin7 Min 7 7.0 0 0 0 0 0 15547 -300 9.5 1140 2.98 20 31.4 504 - - Typ - - - - - - - - - - - - - - - 10 10 Max 14 8.6 0.4 0.4 0.2 0.175 0.175 15854 +300 10.5 1148 3.42 215 32.1 516 - - Unit mA V V V V V V Hz Hz s s s ns s s VP-P VP-P
Pin Connection Diagram
Burst Gate Width Input Horiz Ramp Input Horiz Sync Input Vert Sync Input Filter VCO Tuning Circuit Shunt Regulator Horiz Output
1 2 3 4 5 6 7 8
16 Burst Gate Output Horiz Ramp Driver Output 14 Flyback Pulse Input 15 13 Inverted Horiz Output
12 Blanking Output 11 Vert Output 10 Gain/Window Switch Input 9 GND
16
9
.260 (6.6) Max
1
8
.785 (19.9) Max
.300 (7.62)
.200 5.08) Max .245 (6.22) Min
.100 (2.54)
.700 (17.7)

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